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| Ordering number : ENN6507A Thick-Film Hybrid IC STK672-080 Stepping Motor Driver (Sine Wave Drive) Output Current: 2.8 A (No Heat Sink*) Unipolar constant-current chopper (external excitation PWM) circuit with built-in microstepping controller Overview The STK672-080 is a stepping motor driver hybrid IC that uses power MOSFETs in the output stage. It includes a built-in microstepping controller and is based on a unipolar constant-current PWM system. The STK672-080 supports application simplification and standardization by providing a built-in 4 phase distribution stepping motor controller. It supports five excitation methods: 2 phase, 1-2 phase, W1-2 phase, 2W1-2 phase, and 4W1-2 phase excitations, and can provide control of the basic stepping angle of the stepping motor divided into 1/16 step units. It also allows the motor speed to be controlled with only a clock signal. The use of this hybrid IC allows designers to implement systems that provide high motor torques, low vibration levels, low noise, fast response, and high-efficiency drive. Compared to the earlier SANYO STK672-050, the STK672-080 features a significantly smaller package for easier mounting in end products. Continued on next page. Package Dimensions unit: mm 4186 [STK672-080] 46.6 41.2 8.5 Applications * Facsimile stepping motor drive (send and receive) * Paper feed and optical system stepping motor drive in copiers * Laser printer drum drive * Printer carriage stepping motor drive * X-Y plotter pen drive * Other stepping motor applications 12.7 1 15 14x2.0=28 4.0 2.0 0.5 0.4 2.9 Features * Can implement stepping motor drive systems simply by providing a DC power supply and a clock pulse generator. (6.6) Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein. SANYO Electric Co.,Ltd. Semiconductor Company TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 52004TN (OT) / 22002TN (OT) No. 6507-1/17 1.0 3.6 25.5 STK672-080 Continued from preceding page. * The CLK input pin include built-in malfunction prevention circuits for external pulse noise. * Both an ENABLE and RESET pin are provided as Schmitt trigger inputs with built-in 20 k (typical) pullup resistors. * No audible noise is generated by the differences in the time constant between phases A and B when the motor position is held fixed due to the adoption of external excitation. * The reference voltage Vref can be set to any level between 0 and 1/2 VCC2. This allows the STK672-080 to provide microstepping operation even for small motor currents. Specifications Absolute Maximum Ratings at Tc = 25C Parameter Maximum supply voltage1 Maximum supply voltage2 Input voltage Phase output current Repeatable avalanche current Power loss Operating substrate temperature Junction temperature Storage temperature Symbol VCC1 max VCC2 max VIN max IOH max Ear max Pd max Tc max Tj max Tstg c-a = 0 No signal No signal Logic input pins 0.5 s, 1 pulse, when VCC1 applied. Conditions Ratings 52 -0.3 to +7.0 -0.3 to +7.0 3.3 30 8 105 150 -40 to +125 Unit V V V A mJ W C C C Allowable Operating Ranges at Ta = 25C Parameter Supply voltage1 Supply voltage2 Input voltage Phase driver voltage handling Phase current 1 Phase current 2 Symbol VCC1 VCC2 VIH VDSS IOH 1 IOH 2 Tr1, 2, 3, and 4 (the A, A, B, and B outputs) Tc = 105C, CLK 200 Hz Tc = 80C, CLK 200 Hz Conditions With input signals present With input signals present Ratings 10 to 45 5 5% 0 to VCC2 100 (min) 2.8 3 Unit V V V V A A Electrical Characteristics at Tc = 25C, VCC1 = 24 V, VCC2 = 5 V Parameter Control supply current Output saturation voltage Average output current FET diode Forward voltage [Control Inputs] Input voltage VIH VIL IIH IIL VI II VOH VOL Except for the Vref pin Except for the Vref pin Except for the Vref pin Except for the Vref pin 0 125 1 250 4 1 10 510 V V A A Symbol ICC Vsat Io ave Vdf Conditions Pin 6 input, with ENABLE pin held low. RL = 12 Load: R = 3.5 W/L = 3.8 mH per phase If = 1 A 0.445 Ratings min typ 2.1 0.65 0.5 1 max 14 1 0.56 1.5 Unit mA V A V Input current [Vref Input Pin] Input voltage Input current [Control Outputs] Output voltage Pin 7 Pin 7, 2.5-V input 0 330 415 2.5 545 V A I = -3 mA, pin MOI I = +3 mA, pin MOI 2.4 0.4 V V Continued on next page. No. 6507-2/17 STK672-080 Continued from preceding page. Parameter [Current Distribution Ratio (A*B)] 2W1-2, W1-2, 1-2 2W1-2, W1-2 2W1-2 2W1-2, W1-2, 1-2 2W1-2 2W1-2, W1-2 2W1-2 2 PWM frequency Vref Vref Vref Vref Vref Vref Vref Vref fc 37 = 1/8 = 2/8 = 3/8 = 4/8 = 5/8 = 6/8 = 7/8 100 92 83 71 55 40 21 100 47 57 % % % % % % % % kHz Symbol Conditions Ratings min typ max Unit Note: A constant-voltage power supply must be used. The design target value is shown for the current distribution ratio. No. 6507-3/17 VCC2 Vref 7 5 4 3 2 A AB B BB 6 Internal Block Diagram M1 Current distribution ratio switching 8 M2 9 Excitation mode control CWB 10 Phase advance counter Pseudo-sine wave generator CLOCK 11 Raising edge/falling edge detection and switching M3 12 RESET 13 Phase excitation drive signal generation STK672-080 MoI 14 - + Excitation state monitor ENABLE 15 Reference clock generation PWM control - + CR oscillator 1 SUB PG A13256 No. 6507-4/17 STK672-080 Test Circuit Diagrams Vsat VCC2 6 11 5 4 8 9 Vref=2.5V STK672-080 7 V VCC2 13 1 A13257 A13258 Vdf VCC1 6 A AB B BB STK672-080 V RL 5 4 3 2 A AB B BB Start 3 2 + 1 A IIH, IIL VCC2 loave, Icc, fc VCC1 VCC2 A M1 M2 M3 6 8 9 12 11 STK672-080 10 13 14 15 7 1 + 13 1 fc A STK672-080 Vref ENABLE 7 15 2 BB SW3 VCC1 8 9 3 4 AB B SW2 Start 11 6 5 A a ba SW1 b IIH A IIL CLK CWB RESET ENABLE A 2.5V Vref A13259 A13260 To measuring Io ave: With SW1 set to the b position, input Vref and switch SW2. To measuring fc: With SW1 set to the a position, set Vref to 0 V, and switch SW3. To measuring Icc: Set the ENABLE pin low. No. 6507-5/17 STK672-080 Power-on reset The application must perform a power-on reset operation when VCC2 power is first applied to this hybrid IC. Application circuit that used 2W1-2 phase excitation (microstepping operation) mode. VCC2=5V VCC1=10V to 45V 6 5 14 8 14 9 VCC2=5V ENABLE Vf 0.3V + CBW MoI Simplified power-on reset circuit (This circuit cannot be used to detect drops in the power-supply voltage.) A AB B BB Two-phase stepping motor 100F or higher No. 6507-6/17 4 3 2 + 12 14 15 11 STK672-080 RESET 13 10 14 SG 1 VCC2=5V PG CLK Ro1 7 RoX Vref Ro2 A value of about 100 is recommended for RO2 to minimize the influence of the Vref pin internal impedance, which is 6 k. ROX: The input impedance is 6 k 30%. A13261 Setting the Motor Current The motor current IOH is set by the Vref voltage on the hybrid IC pin 7. The following formula gives the relationship between IOH and Vref. ROX = (RO2 x 6 k) / (RO2 + 6 k) *************(1) Vref = VCC2 x ROX / (RO1 + ROX) **************(2) 1 Vref IOH = -- x ---- *********************************************(3) k RS K: 4.7 (Voltage division ratio), Rs: 0.15 (The hybrid IC's internal current detection resistor (precision: 3%) Applications can use motor currents from the current (0.05 to 0.1 A) set by the duty of the frequency set by the oscillator up to the limit of the allowable operating range, IOH = 2.8 A Ioave 0A Motor current waveform IOL IOH A13262 Function Table M2 M1 M3 1 0 0 0 2 phase excitation 1-2 phase excitation 0 1 1-2 phase excitation W1-2 phase excitation 1 0 W1-2 phase excitation 1 1 2W1-2 phase excitation Phase switching clock edge timing Rising edge only Rising and falling edges 2W1-2 phase excitation 4W1-2 phase excitation Forward CWB 0 Reverse 1 ENABLE RESET Motor current is cut off when low Active low STK672-080 Functional Description External Excitation Chopper Drive Block Description VCC1 IOFF ION Enable OA (control signal) Current divider Vref A=1 L2 L1 Divider CR oscillator 800kHz 45kHz S - + D1 MOSFET AND Q Latch circuit R Noise filter Rs A13263 Driver Block Basic Circuit Structure Since this hybrid IC adopts an external excitation method, no external oscillator circuit is required. When a high level is input to oA in the basic driver block circuit shown in the figure and the MOSFET is turned on, the comparator + input will go low and the comparator output will go low. Since a set signal with the PWM period will be input, the Q output will go high, and the MOSFET will be turned on as its initial value. The current ION flowing in the MOSFET passes through L1 and generates a potential difference in Rs. Then, when the Rs potential and the Vref potential become the same, the comparator output will invert, and the reset signal Q output will invert to the low level. Then, the MOSFET will be turned off and the energy stored in L1 will be induced in L2 and the current IOFF will be regenerated to the power supply. This state will be maintained until the time when an input to the latch circuit set pin occurs. In this manner, the Q output is turned off and on repeatedly by the reset and set signals, thus implementing constant current control. The resistor and capacitor on the comparator input are spike removal circuit elements and synchronize with the PWM frequency. Since this hybrid IC uses a fixed frequency due to the external excitation method and at the same time also adopts a synchronized PWM technique, it can suppress the noise associated with holding a position when the motor is locked. Input Pin Functions Pin No. 11 10 15 8, 9, 12 13 7 Symbol CLK CWB ENABLE M1, M2, M3 RESET Vref Function Phase switching clock Rotation direction setting (CW/CCW) Output cutoff Excitation mode setting System reset Current setting Pin circuit type Built-in pull-up resistor CMOS Schmitt trigger input Built-in pull-up resistor CMOS Schmitt trigger input Built-in pull-up resistor CMOS Schmitt trigger input Built-in pull-up resistor CMOS Schmitt trigger input Built-in pull-up resistor CMOS Schmitt trigger input Input impedance 6 k (typ.) 30% No. 6507-7/17 STK672-080 Input Signal Functions and Timing * CLK (phase switching clock) Input frequency range: DC to 50 kHz Minimum pulse width: 10 s Duty: 40 to 60% (However, the minimum pulse width takes precedence when M3 is high.) Pin circuit type: Built-in pull-up resistor (20 k, typical) CMOS Schmitt trigger structure Built-in multi-stage noise rejection circuit Function --When M3 is high or open: The phase excited (driven) is advanced one step on each CLK rising edge. --When M3 is low: The phase is advanced one step by both rising and falling edges, for a total of two steps per cycle. CLK Input Acquisition Timing (M3 = Low) CLK input System clock Phase excitation counter clock Excitation counter up/down Control output timing Control output switching timing A13264 * CWB (Method for setting the rotation direction) Pin circuit type: Built-in pull-up resistor (20 k, typical) CMOS Schmitt trigger structure Function --When CWB is low: The motor turns in the clockwise direction. --When CWB is high: The motor turns in the counterclockwise direction. Notes: When M3 is low, the CWB input must not be changed for about 6.25 s before or after a rising or falling edge on the CLK input. * ENABLE (Controls the on/off state of the A, A, B, and B excitation drive outputs and selects either operating or hold as the internal state of this hybrid IC.) Pin circuit type: Built-in pull-up resistor (20 k, typical) CMOS Schmitt trigger structure Function --When ENABLE is high or open: Normal operating state --When ENABLE is low: This hybrid IC goes to the hold state and excitation drive output (motor current) is forcibly turned off. In this mode, the hybrid IC system clock is stopped and no inputs other than the reset input have any effect on the hybrid IC state. No. 6507-8/17 STK672-080 * M1, M2, and M3 (Excitation mode and CLK input edge timing selection) Pin circuit type: Built-in pull-up resistor (20 k, typical) CMOS Schmitt trigger structure Function: M2 M1 M3 1 0 0 0 2 phase excitation 1-2 phase excitation 0 1 1-2 phase excitation W1-2 phase excitation 1 0 W1-2 phase excitation 1 1 2W1-2 phase excitation Phase switching clock edge timing Rising edge only Rising and falling edges 2W1-2 phase excitation 4W1-2 phase excitation Valid mode setting timing: Applications must not change the mode in the period 5 s before or after a CLK signal rising or falling edge. Mode Setting Acquisition Timing CLK input System clock Mode setting M1 to M3 Mode switching clock Mode switching timing Hybrid IC internal setting state Phase excitation clock Excitation counter up/down A13265 * RESET (Resets all parts of the system.) Pin circuit type: Built-in pull-up resistor (20 k, typical) CMOS Schmitt trigger structure Function --All circuit states are set to their initial values by setting the RESET pin low. (Note that the pulse width must be at least 10 s.) At this time, the A and B phases are set to their origin, regardless of the excitation mode. The output current goes to about 71% after the reset is released. Notes: When power is first applied to this hybrid IC, Vref must be established by applying a reset. Applications must apply a power on reset when the VCC2 power supply is first applied. * Vref (Sets the current level used as the reference for constant-current detection.) Pin circuit type: Analog input structure Function --Constant-current control can be applied to the motor excitation current at 100% of the rated current by applying a voltage less than the control system power supply voltage VCC2 minus 2.5 V. --Applications can apply constant-current control proportional to the Vref voltage, with this value of 2.5 V as the upper limit. Output Pin Functions Pin No. 14 Symbol MoI Function Phase excitation monitor Pin circuit type Standard CMOS structure Output Signal Functions and Timing * A, A, B, and B (Motor phase excitation outputs) Function --In the 4 phase and 2 phase excitation modes, a 3.75 s (typical) interval is set up between the A and A and B and B output signal transition times. No. 6507-9/17 STK672-080 Phase States During Excitation Switching * Excitation phases before and after excitation mode switching 2W1-2 phase 2 phase A 0 1 28 27 25 B 24 20 8B 12 9 20 17 19 16 A 16 A W1-2 phase 1-2 phase 30 4 28 B 24 20 22 20 18 16 A 1-2 phase 2 phase A 0 28 28 20 20 16 A 2 phase 1-2 phase A 0 4 B 12 12 18 A 2 phase W1-2 phase A 30 29 5 B 24 28 20 4 12 8B 22 6 B 28 20 4 12 B 20 21 16 A A 14 13 17 A 12 B B 28 4 14 8B 22 4 26 0 28 20 4 6 B 12 16 B 10 21 13 17 A 2 phase 2W1-2 phase A 25 28 0 4 24 8 20 12 16 B 9 14 8B 12 12 10 22 20 18 16 A 1-2 phase W1-2 phase A 30 2 29 14 6 4 28 26 B 24 A 0 15 28 4 B 24 2W1-2 phase 1-2 phase 31 A 3 28 0 4 8 24 20 16 12 4 5 8B 11 12 2W1-2 phase W1-2 phase A 30 31 0 1 2 3 29 4 28 5 27 30 0 2 26 6 28 4 25 26 7 6 B 24 24 8 8B 22 10 23 20 9 1816 1412 22 10 11 21 20 12 13 19 18 17 161514 A W1-2 phase 2W1-2 phase A 2 4 28 0 4 24 20 12 16 8 6 B 8B 10 12 23 21 19 17 A 1-2 phase 2W1-2 phase A 1 5 15 13 27 25 30 0 2 28 4 26 6 24 22 8 20 10 18 12 16 14 W1-2 phase 2 phase A 0 2 30 28 26 29 31 1 3 5 7 B 9 11 B 24 Excitation phase according to the first clock input pulse after changing the excitation mode setting (M1 to M2) Excitation phase immediately before setting the excitation mode A13266 No. 6507-10/17 STK672-080 * Excitation phases before and after excitation mode switching 2W1-2 phase 2 phase 31 A 0 28 28 B 24 23 20 8B 12 21 20 16 A W1-2 phase 2 phase A 0 28 28 B 24 20 22 8B 12 22 20 16 A 1-2 phase 2 phase A 0 28 28 20 20 16 A 2 phase 1-2 phase A 0 4 B 12 12 18 A 2 phase W1-2 phase A 2 3 27 B 24 28 20 4 12 8B 26 B 28 20 4 12 B 10 19 A A A13267 2W1-2 phase 1-2 phase A 01 4 5 28 0 4 8 24 20 16 12 13 12 8B 9 2W1-2 phase W1-2 phase A 30 31 0 1 2 3 29 4 28 5 27 30 0 2 26 6 28 4 25 26 7 6 B 24 24 8 8B 22 10 23 20 9 1816 1412 22 10 11 21 20 12 13 19 18 17 161514 A W1-2 phase 2W1-2 phase A 31 1 3 5 30 0 2 28 4 26 6 24 22 8 20 10 18 12 16 14 29 4 7 25 B 24 15 1716 A W1-2 phase 1-2 phase A 02 4 28 0 4 24 20 12 16 8 6 B 8B 10 12 18 16 A 1-2 phase W1-2 phase A 30 2 14 30 30 6 4 29 27 25 26 B 24 7 B 9 11 13 23 21 19 14 17 A 15 1-2 phase 2W1-2 phase A 30 27 B B 3 4 26 8B 22 28 0 4 24 20 16 12 10 14 6 28 0 4 24 8 20 12 16 B 24 7 B 11 23 19 A 15 2 phase 2W1-2 phase A B 28 20 4 12 11 B 16 A 18 No. 6507-11/17 STK672-080 Excitation Time and Timing Charts * CLK rising edge operation 2 Phase Excitation Timing Chart (M3=1) M1 0 M2 0 M3 RESET CWB MOSFET Gate Signal 1 0 1-2 Phase Excitation Timing Chart (M3=1) M1 0 M2 0 M3 0 RESET CWB MOSFET Gate Signal MOSFET Gate Signal 1 1 CLK A A B B CLK A A B B MOI 100% 71% Comparator Reterence Voltage Comparator Reterence Voltage MOI 100% 71% Vref A 100% 71% Vref A 100% 71% Vref B Vref B W1-2 Phase Excitation Timing Chart (M3=1) M1 0 M2 0 M3 0 RESET CWB CLK MOSFET Gate Signal 1 1 2W1-2 Phase Excitation Timing Chart (M3=1) M1 0 M2 0 M3 0 RESET CWB CLK A A 1 1 1 A A B B MOI 100% 92% 71% Comparator Reterence Voltage 40% Comparator Reterence Voltage B B MOI 100% 92% 83% 71% 55% 40% 20% Vref A 100% 92% 71% 40% Vref A 100% 92% 83% 71% 55% 40% 20% Vref B Vref B A13268 No. 6507-12/17 STK672-080 * CLK rising and falling edge operation 1-2 Phase Excitation Timing Chart (M3=0) M1 0 M2 0 M3 0 RESET CWB MOSFET Gate Signal W1-2 Phase Excitation Timing Chart (M3=0) M1 0 M2 0 M3 0 RESET CWB MOSFET Gate Signal MOSFET Gate Signal 1 CLK A A B B CLK A A B B MOI 100% 71% Comparator Reterence Voltage Comparator Reterence Voltage MOI 100% 92% 71% 40% Vref A 100% 71% Vref A 100% 92% 71% 40% Vref B Vref B 2W1-2 Phase Excitation Timing Chart (M3=0) M1 0 M2 0 M3 0 RESET CWB CLK MOSFET Gate Signal 1 4W1-2 Phase Excitation Timing Chart (M3=0) M1 0 M2 0 M3 0 RESET CWB CLK A A 1 1 A A B B MOI 100% 92% 83% 71% 55% 40% 20% B B MOI 100% 97% 92% 88% 77% 83% 71% 66% 55% 48% 40% 31% 14% 20% Comparator Reterence Voltage Vref A 100% 92% 83% 71% 55% 40% 20% Comparator Reterence Voltage Vref A 100% 97% 92% 88% 77% 83% 66% 71% 48% 55% 40% 31% 14% 20% Vref B Vref B A13269 No. 6507-13/17 STK672-080 Thermal Design 1-2 phase excitation W1-2 phase excitation 2W1-2 phase excitation 4W1-2 phase excitation Here, t1 and t3 can be determined from the same formulas for all excitation methods. -L t1 = -------- * R + 0.35 R + 0.35 n (1 - ---------- * IOH) VCC1 -L t3 = ---- * R VCC1 + 0.35 n (--------------------) IOH * R + VCC1 + 0.35 However, the formula for t2 differs with the excitation method. 2 phase excitation 2 t2 = ------ - (t1 +t3) fclock 1-2 phase excitation 3 t2 = ------ - t1 fclock 15 t2 = ------ - t1 fclock IOH 7 W1-2 phase excitation t2 = ------ - t1 fclock 2W1-2 phase excitation 4W1-2 phase excitation t3 t1 t2 A13270 Motor Phase Current Model Figure (2 Phase Excitation) fclock: CLK input frequency (Hz) Vsat: The voltage drop of the power MOSFET and the current detection resistor (V) Vdf: The voltage drop of the body diode and the current detection resistor (V) IOH: Phase current peak value (A) t1: Phase current rise time (s) VCC1: Supply voltage applied to the motor (V) t2: Constant-current operating time (s) L: Motor inductance (H) t3: Phase switching current regeneration time (s) R: Motor winding resistance (W) No. 6507-14/17 STK672-080 Tc max: Hybrid IC substrate temperature (C) Ta: Application internal temperature (C) PdEX: Hybrid IC internal average loss (W) Determine c-a from the above formula and then size S (in cm2) of the heat sink from the graphs shown below. The ambient temperature of the device will vary greatly according to the air flow conditions within the application. Therefore, always verify that the size of the heat sink is adequate to assure that the Hybrid IC back surface (the aluminum plate side) will never exceed a Tc max of 105C, whatever the operating conditions are. 20 c-a -- Pd Heat sink thermal resistance, c-a -- C/W c-a= Tc max - Ta (C/W) Pd Tc max=105C b am ed nte ure ara rat Gu mpe te c-a -- S 2 Heat sink thermal resistance, c-a -- C/W 2m 10 m thi ith 16 ck Al (w 7 5 pla Vertical standing type Convection cooling te ( 12 the wit sur hn fac os ep urf ain ace ted pre 8 bla par 60 C 4 40 50C 3 ck) atio n) ien t C 2 No. Fin 25.5(C/W) 0 0 2 4 6 8 10 12 14 16 No. Fin 25.5(C/W) 1.0 10 2 3 5 7 100 2 3 5 IC internal average power dissipation, Pd -- W Heat sink area, S -- cm2 Next we determine the usage conditions with no heat sink by determining the allowable hybrid IC internal average loss from the thermal resistance of the hybrid IC substrate, namely 25.5 C/W. 105 - 50 For a Tc max of 105C at an ambient temperature of 50C PdEX = -------- = 2.15 W 25.5 For a Tc max of 105C at an ambient temperature of 40C 105 - 40 PdEX = -------- = 2.54 W 25.5 This hybrid IC can be used with no heat sink as long as it is used at operating conditions below the losses listed above. (See Tc - Pd curve in the graph on page 17.) No. 6507-15/17 STK672-080 fc -- VCC2 fc -- Tc 55 53 55 53 PWM frequency, fc -- kHz PWM frequency, fc -- kHz 4.5 5 5.5 6 51 49 47 45 43 41 39 37 35 4 51 49 47 45 43 41 39 37 35 0 20 40 60 80 100 120 Supply voltage, VCC2 -- V Substrate temperature, Tc -- C Motor Current vs. Output Supply Voltage 1.6 1.4 1.2 1 0.8 1.6 Internal Diode Forward Voltage vs. Motor Current Internal diode forward voltage, Vdf -- V 1.4 1.2 1 Output saturation voltage, Vsat -- V Tc =1 C 05 =2 5C Tc= Tc= 25 C C 105 0.8 0.6 0.4 0.2 0 0 Tc 0.6 0.4 0.2 0 0 0.5 1 1.5 2 2.5 3 3.5 0.5 1 1.5 2 2.5 3 Motor current, IOH -- A Motor current, IOH -- A Motor Current vs. Motor Voltage 2.5 2.5 Motor Current vs. Substrate Temperature IOH=2 2 2 Motor current, IOH -- A 1.5 Motor current, IOH -- A 1.5 1 1 IOH=1A 0.5 0.5 Vref=0 0 0 10 20 30 40 50 0 0 20 40 60 80 100 120 Motor voltage, VCC1 -- V Substrate temperature, Tc -- C Reference Voltage vs. Input Current Reference voltage input current, IVref -- A 450 400 Reference Voltage Input Current vs. Substrate Temperature 450 400 350 300 250 200 150 100 50 0 0 20 40 60 80 100 120 Vref=2.5V Input current, IVref --A 350 300 250 200 150 100 50 0 = Tc 25 C Vref=2V Vref=1 0 0.5 1 1.5 2 2.5 Reference voltage, Vref -- V Substrate temperature, Tc -- C No. 6507-16/17 STK672-080 Motor Current vs. Reference Voltage 2 80 Tc -- Pd Substrate temperature rise, Tc -- C 70 60 50 40 30 20 10 0 0 VCC1: 24 V motor: PK264-02B 1.8 Reference voltage, Vref -- V 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0 0.5 1 1.5 2 2.5 0.5 1 1.5 2 2.5 3 3.5 Motor current, IOH -- A Hybrid IC internal average power dissipation, Pd -- W Substrate Temperature Rise Test 60 Motor Current (IOH) Derating Curves for the Operating Substrate Temperature Tc 3.5 Substrate temperature rise, Tc -- C CLK 50 2W1-2ex 200Hz 3 Motor current, IOH -- A 2.5 Hold mo de 40 30 2ex VCC1 : 24V Test motor : PK264-02B Motor current : IOH : 2-phase excitation: 1.5 A 2W1-2 phase excitation: 2 A With no heat sink 2 3 5 7 1000 2 3 5 7 10000 2 3 5 7 100000 2 1.5 20 1 10 0.5 0 0 0 0 Motor voltage: 24 V Motor resistance (R): 0.4 Inductance (L): 1.2 mH 20 40 60 80 100 120 CLK frequency, PPS - Hz Operating substrate temperature, Tc -- C Notes * The above current ranges apply when the output voltage is not in the avalanche state. * The above operating substrate temperatures (Tc) are measured when the motor is operating. Since Tc will vary depending on the ambient temperature (Ta), the value of IOH, and whether IOH is continuous or intermittent, the actual values of Tc must be verified (measured) in an actual operating end product. Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of May, 2004. Specifications and information herein are subject to change without notice. PS No. 6507-17/17 |
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